In recent years, with the rapid development of the semiconductor industry, the development of semiconductor devices is oriented towards a smaller volume, higher circuit intensity, a higher speed and lower power consumption, and integrated circuit has entered a technical phase of submicron level. Therefore, in order to meet the demands of a smaller volume and higher intensity, requirements have been proposed in two aspects so far: on the one hand, it is required that the diameter of wafers should be gradually increased, and by 2005, silicon wafers having a diameter of 300 mm have become mainstream and it is predicted that in 2012, silicon wafers having a diameter of 450 mm (18 in) will be in use, and the diameter of wafers is increasing continuously at a rate of about 1.5 times every 9 years while evolving towards larger area. On the other hand, a need has arisen that the utilization rate of the surface area could be increased without increasing the dimensions of existing wafers so as to increase the surface area thereof that can be processed. However, no solutions capable of increasing the utilization rate of wafers have been proposed so far based on the dimensions of existing wafers.